Hi all,
I am trying to modify the "10-tap 8-bit Camera with DRAM (FPGA).vi" example to simultaneously grab two frames (original and processed) from NI-1473R LX110. I have created extra FIFOs, data packers. I am trying to write two frames to DRAM at the same time but I don't have any control over the location/address. I can just select upper/lower banks.
My question is: is this doable? Or do I have to use a memory with different addresses?
I have read in other NI threads that for high speed applications, packing the data to DRAM works much better than using other defined memory.
Obviously it is flawed but my example is attached.